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The Institute of Electrical and Electronics Engineers (IEEE) recently held its 2014 IEEE International Memory Workshop (IMW) from 5/18/2014 to 5/21/2014 in Taipei, Taiwan. This workshop is an international academic conference on semiconductor memory technologies, and while much of the discussion is even more specialized than us technology buffs get into, the occasional significant development is featured. Such was the case at this year’s workshop, as a Japanese research team has developed technology to dramatically improve the write speeds of solid state drives (SSDs). This development also increases the power efficiency and life span of NAND flash memory used in SSDs.
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The research team is led by Ken Takeuchi, a professor at Tokyo’s Chuo University and its Department of Electrical, Electronic and Communications Engineering. The title of the thesis presented at the 2014 IEEE workshop is “NAND Flash Aware Data Management System for High-Speed SSDs by Garbage Collection Overhead Suppression.” When utilizing NAND flash memory, it is not possible to simply overwrite data on the same memory area, as garbage collection can only erase entire blocks of data, and not individual pages. This makes it necessary to write data to a new page, and then invalidate the old area (which will eventually be erased and made available for reuse). As a result of this, data is fragmented across multiple pages and blocks, increasing the invalid (unavailable until garbage collection completes) area and decreasing the remaining available storage capacity.
The smaller the SSD capacity, the more significant this problem can quickly become. When NAND flash carries out the garbage collection routine, fragmented data is rearranged in a continuous method and the invalid blocks are then erased and returned to the available flash pool for reuse. This process can take up to 100ms (or longer), which dramatically decreases the write speed of an SSD as it waits for garbage collection to play “catch-up” to free up additional blocks of NAND to write to. This is also often referred to as “write amplification”.
In an effort to address this issue, the research team in September of last year developed a method that made improvements to the “middleware” that controls storage for database applications. There are generally two levels of “middleware” — SE (storage engine) middleware, that assigns the logical addresses when application software accesses the storage device; and FTL (flash translation layer) middleware, that converts those logical addresses into physical addresses on the SSD controller side. This time around, the team developed a more versatile method that gets the two levels of “middleware” to work in conjunction.
The research team’s new method forms a new middleware layer called “LBA (logical block address) scrambler” that resides between the file system (OS) and the FTL (flash translation layer). This LBA scrambler layer works in concert with the FTL, converting the logical addresses of data being written to physical addresses, effectively reducing fragmentation across multiple pages. Instead of writing data onto a new blank page, the data is written to a page that is already fragmented in a block that is scheduled to be erased next. This results in an increase in the ratio of invalid pages within the one block that is to be erased next, rather than being spread over different pages in different blocks that will each have to wait its turn for erasure. This also reduces the number of valid pages that need to be copied to another area as the garbage collection routine takes place.
In their simulations, the research team was able to confirm that their new “LBA scrambler” middleware improved the write speeds of SSDs by up to 300%! A side effect of this process is to reduce power consumption by up to 60%, and to reduce the number of write/erase cycles required by up to 55%. These reductions will also result in increased product life of the NAND flash memory in use. With this new method, no changes to the NAND flash memory itself are required as the changes are all accomplished within the new middleware. This means that it could be applied to existing SSDs in a wide variety of usage applications.
300% improvement seems far fetched, considering this is just a fancy garbage collection.
Also, afaik this even wasn’t tested on real hardware.
It’s not fancy, it’s simple yet very clever by removing the single most time-consuming bottle-neck in current SSD-controllers. Whether it’s 300% in reality is an entirely different matter since current SATA-generations can’t handle that bandwidth. SATA 6Gbit maxes out at a theoretical 750MB/s (in reality it’s lower due to overhead from OS (file system among other things), hardware, drivers etc.
It’s not really a bottleneck, since current controllers are capped with SATA6gBIT speeds anyway. And since we have TRIM, garbage collection is already pretty efficient. So this won’t help with seqiential speeds not even a little bit. Its a hard limit of controllers and flash that no middleware can fix.
What this will do (if ever implemented) its gonna reduce write amplification (less wear) and increase write speed, when there are little fresh blocks left (heavy workload). This will be especially apperent, when drive is nearly full.
Just expecting 3x improvement in sequential speeds is just plain naive and only indicates, that person expecting this doesn’t know much about controller and flash architecture.
Not sure of who’s got it wrong.
Normally a single write (a byte or a KB or whatever) means the SSD-controller reads an entire block that the data is stored in into a buffer, changes the data and then saves it to a NEW block (if it has been used before it must also be erased before it can be written to) and invalidates the old original block which TRIM will eventually take care of. It’s very wasteful in read/writes as well as copying entire blocks to change a few bytes or kilobytes here and there. Most SSD’s become fragmented (which isn’t a problem in itself since seek-times are practically out of the equation), but having to copy 2000 blocks and then rewrite them to clear-flagged areas when they change.. That’s very time consuming (relatively speaking and very inefficient.
Garbage collection is normally about changing flags on blocks that are no longer used to make them available for new writes (but they have to clear the blocks before new writes).
By reading and then writing the change back to the same block several time consuming steps are removed and write amplification and wear level is severely diminished. This obviously affects power usage (added bonus) since the SSD unit will only have to do half the job to reach the goal as current controllers with normal GC & TRIM.
Yeah thats absolutly right. Still doesn’t change the fact, that this won’t help with sequential speeds (since this is limited to flash and controller hardware anyway). Its laughable to see some reporters claiming 1.5GB/s speeds purely based on this 300% improvement.
This improvment will defenetly help with lowend controllers. Too bad nobody is going to implement on old hardware anyway. My old v4 (which is based on phison S5) could really use this >:)
In their simulations, the research team was able to confirm that their new “LBA scrambler” middleware improved the write speeds of SSDs by up to 300%! https://goo.gl/ai61Qh
Can you give me the reference to this work?